HardBD & Active'22


HardBD & Active'25

Joint International Workshop on Big Data Management on Emerging Hardware
and Data Management on Virtualized Active Systems

To be Sponsored by and Held in Conjunction with ICDE 2025

May 19, 2025 in Hong Kong SAR, China

bullet Description
bullet Topics
bullet Submission
bullet Important Dates
bullet Program
bullet Keynote
bullet Organizers
bullet PC Members
bullet Previous Workshops
2024
2023
2022
2021
2020
2019
2018
2017
2016
2015

  Description

HardBD & Active'25 will be a half-day workshop co-located with ICDE'25. The aim of this workshop is to bring together researchers, practitioners, system administrators, and others interested to share their perspectives on exploiting new hardware technologies for data-intensive systems, and to discuss and identify future directions and challenges in this area. The workshop aims at providing a forum for academia and industry to exchange ideas through research and position papers.

[ Go to Top ]

  Topics

 Topics of interest include but are not limited to:

  • Data Management with Software-Hardware-System Co-design
  • Main Memory Data Management (e.g. Multi-core, Cache, SIMD)
  • Active Technologies (e.g., GPU, FPGA, and ASIC) in Co-design Architectures
  • Data Management on New Memory Technologies (e.g., SSD, NVM, HBM, PIM)
  • Distributed Data Management Utilizing New Network Technologies (e.g., RDMA, CXL)
  • Data Management on the Cloud (e.g., Scalability and Security, Disaggregation)
  • Secure Data Management Exploiting Trusted Execution Environment
  • Novel Applications of New Hardware Technologies in Query Processing, Transaction Processing, or Big Data Systems (e.g., SQL/NoSQL/NewSQL Databases, Hadoop/Spark, Blockchains, etc.)
  • Benchmarking, Performance Models, and/or Tuning of Data Management Workloads on Modern Hardware

[ Go to Top ]

  Author and Submission Guidelines

We welcome submissions of original, unpublished research papers that are not being considered for publication in any other forum. Papers should be prepared in the IEEE format and submitted as a single PDF file. The paper length should not exceed 6 pages excluding the bibliography.

The submission site is https://cmt3.research.microsoft.com/HardBDActive2025.
(Note: The Microsoft CMT service was used for managing the peer-reviewing process for this conference. This service was provided for free by Microsoft and they bore all expenses, including costs for Azure cloud services as well as for software development and support.)

[ Go to Top ]

  Important Dates


Paper submission: February 7 February 14, 2025 (Friday) 11:59:00 PM PT
Notification of acceptance: March 11, 2025 (Tuesday)
Camera-ready copies: March 25 March 31, 2025 (Monday)
Workshop: May 19, 2025 (Monday)

[ Go to Top ]

  Program


9:00-9:05 Welcome Messages

9:05-10:30 Session 1

10:30-11:00 Coffee Break

11:00-l2:25 Session 2

12:25-12:30 Closing Remarks

[ Go to Top ]

  Keynote Talks


Bingsheng He      High-Performance Graph Data Systems: Lessons Learned and Future Directions


Bingsheng He
National University of Singapore

Abstract: Graph data structures are fundamental to numerous data processing and learning applications. Over the past decades, the size, diversity, and complexity of graph data have grown significantly, presenting a wide array of challenges from processing, learning to even foundation models. This has spurred extensive research in the field, with performance emerging as a critical factor. Throughout this period, we have developed a variety of graph data systems, ranging from parallel graph processing systems on heterogeneous hardware like GPU, FPGA and new architectures to applications in cryptocurrency and e-commerce. In this talk, I will share our journey in building high-performance graph data systems, summarize the lessons we have learned, and outline future directions for this field. More details about our research can be found at https://www.comp.nus.edu.sg/~hebs/.

Bio: Dr. Bingsheng He is currently a Professor and Vice-Dean (Research) at School of Computing, National University of Singapore. Before that, he was a faculty member in Nanyang Technological University, Singapore (2010-2016), and held a research position in the System Research group of Microsoft Research Asia (2008-2010), where his major research was building high performance cloud computing systems for Microsoft. He got the Bachelor degree in Shanghai Jiao Tong University (1999-2003), and the Ph.D. degree in Hong Kong University of Science & Technology (2003-2008). His current research interests include cloud computing, database systems and high performance computing. He has been a winner for industry faculty awards from Microsoft, NVIDIA, Xilinx, Alibaba, Webank, SenseTime and AMD. His work also won multiple recognitions as “Best papers” collection or awards in top forums such as SIGMOD 2008, VLDB 2013 (demo), IEEE/ACM ICCAD 2017, PACT 2018, IEEE TPDS 2019, FPGA 2021, and VLDB 2023 (industry)/2024. Since 2010, he has (co-)chaired a number of international conferences and workshops, including IEEE CloudCom 2014/2015, BigData Congress 2018, ICDCS 2020 and ICDE 2024. He has served in editor board of international journals, including IEEE Transactions on Cloud Computing (IEEE TCC), IEEE Transactions on Parallel and Distributed Systems (IEEE TPDS), IEEE Transactions on Knowledge and Data Engineering (TKDE), Springer Journal of Distributed and Parallel Databases (DAPD) and ACM Computing Surveys (CSUR). He is an ACM Distinguished member and an IEEE Fellow.


Tianzheng Wang      Latency-Optimised Modern Database Engines


Tianzheng Wang
Simon Fraser University

Abstract: Everything takes time in a database engine: I/O, memory stall, synchronization and scheduling all add additional delays in addition to running transaction logic. Reducing and hiding such latency has been a major goal to achieve high transaction and query processing performance, but prior efforts have seen limited adoption by missing joint optimizations that mitigate the impact of multiple latency sources. A prime example is software prefetching which interleaves memory access and compute is often at odds with asynchronous I/O. In this talk, we describe our recent efforts on reducing and hiding latencies by judiciously leveraging both hardware and software primitives such as prefetching instructions, asynchronous I/O and recent userspace interrupts. We also emphasize the effort to make these work in an end-to-end database engine and considerations beyond performance, such as programmability and backward compatibility.

Bio: Tianzheng Wang is an associate professor and director of dual-degree and partnerships programs in the School of Computing Science at Simon Fraser University in Metro Vancouver, Canada. His research centres around the making of database systems in the context of modern hardware, new programming primitives, and new applications. His work also often extends to related areas such as operating systems, parallel programming and distributed systems. Tianzheng Wang received his Ph.D. (2017) and M.Sc. (2014) degrees in Computer Science from the University of Toronto, and B.Sc. (2012) in Computing degree (First Class Honours) from Hong Kong Polytechnic University. His work has been assimilated by cloud vendors and startups, and recognized by two ACM SIGMOD Research Highlight Awards (2021 and 2023), a 2019 IEEE TCSC Award for Excellence in Scalable Computing (Early Career Researchers) and nominations for best paper awards.


[ Go to Top ]

  Organizers


[ Go to Top ]

  PC Members


  • Bingsheng He, National University of Singapore
  • Wolfgang Lehner, TU Dresden
  • Ilia Petrov, Reutlingen University
  • Danica Porobic, Oracle
  • Thamir Qadah, Umm Al-Qura University
  • Kai-Uwe Sattler, TU Ilmenau
  • Evangelia Sitaridi, NVIDIA
  • Rebecca Taft, Cockroach Labs
  • Tianzheng Wang, Simon Fraser University
  • Xuan Zhou, East China Normal University
  • Yongluan Zhou, University of Copenhagen

[ Go to Top ]